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Common Source Push-Pull Pair
D
ARF475FL
S D D S
G S S G
S S
ARF475FL
RF POWER MOSFET
N - CHANNEL PUSH - PULL PAIR * Specified 150 Volt, 128 MHz Characteristics: * Output Power = 900 Watts Peak * Gain = 15dB (Class AB) * Efficiency = 50% min
MAXIMUM RATINGS
Symbol VDSS VDGO ID VGS PD TJ,TSTG TL Parameter Drain-Source Voltage Drain-Gate Voltage Continuous Drain Current @ TC = 25C Gate-Source Voltage Total Device Dissipation @ TC = 25C Operating and Storage Junction Temperature Range Lead Temperature: 0.063" from Case for 10 Sec. (each device)
D
S G G S
165V 450W 150MHz
The ARF475FL is a matched pair of RF power transistors in a common source configuration. It is designed for high voltage push-pull or parallel operation in narrow band ISM and MRI power amplifiers up to 150 MHz.
* High Performance Push-Pull RF Package. * High Voltage Breakdown and Large SOA
for Superior Ruggedness.
* Low Thermal Resistance.
All Ratings: TC = 25C unless otherwise specified.
ARF475FL UNIT Volts Amps Volts Watts C
500 500 10 30 910 -55 to 175 300
STATIC ELECTRICAL CHARACTERISTICS (each device)
Symbol BVDSS VDS(ON) IDSS IGSS g fs VGS(TH) VGS(TH) Characteristic / Test Conditions Drain-Source Breakdown Voltage (VGS = 0V, ID = 250 A) On State Drain Voltage
1
MIN
TYP
MAX
UNIT Volts
500 2.9 4 100 500 100 3 0.9 2 3.3 3.6 1.1 4 0.2
(I D(ON) = 5A, VGS = 10V)
Zero Gate Voltage Drain Current (VDS = VDSS, VGS = 0V) Zero Gate Voltage Drain Current (VDS = 50V, VGS = 0, TC = 125C) Gate-Source Leakage Current (VGS = 30V, VDS = 0V) Forward Transconductance (VDS = 15V, ID = 5A) Gate Threshold Voltage (VDS = VGS, ID = 200mA) Gate Threshold Voltage Match (VDS = VGS, ID = 200mA)
A nA mhos
g fs1 g fs2 Forward Transconductance Match Ratio (V = 15V, I = 5A) / DS D
Volts
THERMAL CHARACTERISTICS
Symbol RJC RJHS Characteristic Junction to Case Case to Sink (Use High Efficiency Thermal Grease and Planar Heat Sink Surface.) MIN TYP 0.15 0.30 MAX 0.165 0.33 UNIT C/W
050-4929 B 6-2007
CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.
Microsemi Website - http://www.microsemi.com
DYNAMIC CHARACTERISTICS (per section)
Symbol Ciss Coss Crss td(on) tr td(off) tf Characteristic Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time
(Push-Pull Configuration)
ARF475FL
Test Conditions VGS = 0V VDS = 50V f = 1MHz VGS = 15V VDD = 250V ID = ID[Cont.] @ 25C RG = 1.6 MIN TYP MAX UNIT
780 125 7 5.1 4.1 12 4.0
830 130 9 10 8 18 7
ns pF
FUNCTIONAL CHARACTERISTICS
Symbol GPS Characteristic
Test Conditions f = 128 MHz Idq = 15mA VDD = 150V Pout = 900W PW = 3ms 10% duty cycle
MIN
TYP
MAX
UNIT dB %
Common Source Amplifier Power Gain Drain Efficiency Electrical Ruggedness VSWR 5:1
14 50
16 55
No Degradation in Output Power
1 Pulse Test: Pulse width < 380 S, Duty Cycle < 2%. Microsemi Reserves the right to change, without notice, the specifications and information contained herein.
Per transistor section unless otherwise specified.
30
ID, DRAIN CURRENT (AMPERES)
3000 12V 1000 500
CAPACITANCE (pf)
25 20
Ciss Coss
11V 10V 9V
100 50 Crss
15 8V 10 7V 5 0 0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 1, Typical Output Characteristics
10
1 .1 1 10 100 200 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 2, Typical Capacitance vs. Drain-to-Source Voltage
30
ID, DRAIN CURRENT (AMPERES)
VDS> ID (ON) x RDS (ON)MAX. 250 SEC. PULSE TEST @ <0.5 % DUTY CYCLE
1.10
TJ = -55C 20
VGS(th), THRESHOLD VOLTAGE (NORMALIZED)
25
1.05
TJ = +25C
15
1.00
10
050-4929 B 6-2007
5
TJ = -55C
TJ = +125C
0.95
0
0 2 4 6 8 10 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 3, Typical Transfer Characteristics
0.90 -50
0 25 50 75 100 125 150 TC, CASE TEMPERATURE (C) Figure 4, Typical Threshold Voltage vs Temperature
-25
ARF475FL
0.18 0.16 0.14 0.12 0.10 0.5 0.08 0.06 0.04 0.02 0 10-5 0.1 0.05 10-4 0.3 SINGLE PULSE Note:
PDM t1 t2 Duty Factor D = t1/t2 Peak TJ = PDM x ZJC + TC
D = 0.9
0.7
10-3 10-2 10-1 1.0 RECTANGULAR PULSE DURATION (SECONDS) FIGURE 5a, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
TJ ( C)
0.0755 Dissipated Power (Watts) 0.0135F 0.161F
TC ( C)
0.0893 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction.
Figure 5b, TRANSIENT THERMAL IMPEDANCE MODEL
Table 1 - Typical Series Equivalent Large Signal Input - Output Impedance Freq. (MHz) 30 60 90 120 150 Zin () gate to gate 5.2 -j10 1.37 -j5.2 .53 -j2.6 .25 -j1.0 .25 +j0.2 ZOL () drain - drain 41 -j20 26 -j25 16 -j23 10 -j20 6.7 -j17
050-4929 B 6-2007
Zin - Gate -gate shunted with 25 IDQ = 15mA each side ZOL - Conjugate of optimum load for 600 Watts peak output at Vdd = 150V 25% duty cycle and PW = 5ms
ZEXT
ARF475FL
128MHz Test amplifier
Po = 900W @150V 3ms pulse 10% Duty Cycle
R1 J1 C1 T1 T2 C7 C8 R2 C1 25pF poly trimmer C2 750pF ATC 700B C3-4 2200pF NPO 500V chip C5-10 10nF 500V chip C11 1000uF 250V electroytic L1 30nH 1.5t #18 enam .375" dia L2 680nH 12t #24 enam .312" dia L3 2t #20 on Fair-Rite 2643006302 bead, ~ 2uH
Vg1 C6 R3
L2 TL3 C3
+ C5
L3 C11 C10
+ Vdd -
TL5
TL1 C2 TL2 C4 R4 C9 Vg2 DUT TL4 TL6 L1
T3
J2
R1-2 3.1 : 3 parallel 22 1W 2512 SMT R3-4 2.2k 1/4W axial T1 1:1 balun 50 coax on Fair-Rite 2843000102 core T2 4:1 25 coax on 2843000102 Fair-Rite balun core T3 1:1 coax balun RG-303 on 2861006802 Fair-Rite core TL1-2 Printed line L= 0.75" w=.23" TL3-6 Printed line L= 0.65" w=.23" 0.23" wide stripline on FR-4 board is ~ 30 Zo
Peak Output Power vs. Vdd and Duty Cycle
900 800 700 600 500 400 300 200 100 0 80
.050
1.2
Max Duty Cycle
Notes: The value of L1 must be adjusted as the supply voltage is changed to maintain resonance in the output circuit. At 128MHz its value changes from approximately 40nH at 100V to 30nH at 150V. With the 50 drain-to-drain load, the duty cycle above 100V must be reduced to insure power dissipation is within the limits of the device. Maximum pulse length should be 100mS or less. See transient thermal impedance, figure 5.
1 0.8
Po Watts
0.6 0.4 0.2 0
100
120
.100
140
.050
160
Thermal Considerations and Package Mounting:
The rated power dissipation is only available when the package mounting surface is at 25C and the junction temperature is 175C . The thermal resistance between junctions and case mounting surface is 0.16C/W. When installed, an additional thermal impedance of 0.15C/W between the package base and the mounting surface is typical. Insure that the mounting surface is smooth and flat. Thermal joint compound must be used to reduce the effects of small surface irregularities. Use the minimum amount necessary to coat the surface. The heatsink should incorporate a copper heat spreader to obtain best results. The package design clamps the ceramic base to the heatsink. A clamped joint maintains the required mounting pressure while allowing for thermal expansion of both the base and the heat sink. Four 4-40 (M3) screws provide the required mounting force. T = 6 in-lb (0.68 N-m).
HAZARDOUS MATERIAL WARNING The white ceramic portion of the device between leads and mounting surface is beryllium oxide, BeO. Beryllium oxide dust is toxic when inhaled. Care must be taken during handling and mounting to avoid damage to this area. These devices must never be thrown away with general industrial or domestic waste.
Drain Supply Voltage Vdd
.125R 4 pls
S
D1
D2
S
.325 +/- .010
.125dia 4 pls
ARF475FL
.570
.320
1.250
S
G1
G2
S
.150
.225
.225
.150
.200
050-4929 B 6-2007
.300 .005 .040
1.500
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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